Direct Sigma Delta Bitstream Processing for High Performance Feedback Control

Abstract

Abstract--- The design, noise, and performance analysis of a digital controller architecture directly processing Sigma Delta bitstreams is described. The use of Sigma Delta bitstream representation allows the controller to achieve very low control latency by removing the bit-stream to parallel conversion step. The controller has a small footprint and low power dissipation from multiplierless design. Based on integrated state variables, the controller achieves stable implementation of a wide range of controller designs with near continuous time performance. A generic technique for estimating the signal to noise ratio of the controller using an appropriate model of Sigma Delta bitstream signal and noise characteristics is outlined. To demonstrate the effectiveness of the Sigma Delta controller in a low latency application, a Q controller for an atomic force microscope cantilever was designed and simulated. The Sigma Delta controller was able to achieve similar performance to its ideal continuous time counterpart and surpass its conventional discrete equivalent while maintaining high output signal resolution and having a footprint that fits easily into an inexpensive micro-power FPGA.