Andrei Ardelean1, Amir Zjajo2, Sumeet Susheel Kumar2, Rene van Leuken2
11:40 - 11:55 | Tue 6 Mar | Treasure Island ABC | TuAT1.3
Simulating large spiking neural networks with a high level of realism in a FPGA requires efficient network architectures that satisfy both the resource and interconnect constraints, as well as the changes in traffic patterns due to learning processes. In this paper, we propose a dataflow architecture based on a multipath ring topology that offers traffic shaping capabilities, and high energy-efficiency for the neuron-to-neuron communications.