A Dedicated Bit-Serial Hardware Neuron for Massively-Parallel Neural Networks in Fast Epilepsy Diagnosis

Si Mon Kueh1

  • 1University of Southampton

Details

12:00 - 14:00 | Tue 7 Nov | Auditorium Foyer, E1/E2, Upper Atrium Space | TPO.4

Session: Lunch, Posters and POC Technologies Demonstrations – Session II

Abstract

This paper outlines the feasibility of detecting epilepsy though low-cost and low-energy dedicated hardware with bit-serial processing. The concept of a novel bit-serial data processing unit (DPU) is presented which implements the functionality of a complete neuron. The proposed approach has been tested using various network configurations and compared with related work. The proposed DPU uses only 24 Adaptive Logic Modules on an Altera Cyclone V FPGA. An array of these DPUs are controlled by a simple finite state machine. The proposed DPU allows the construction of complex hardware ANNs that can be implemented in portable equipment that suits the needs of a single epileptic patient in his or her daily activities to detect impending seizure events.