A Materials to Circuits Analysis of Magnetic Switching, Its Main Challenges and Potential Solutions

Abstract

With the downturn of Moore’s law plus the growing demand for low-power electronics for embedded applications and the IoT, nanomagnets have become potential candidates for low-power logic, memory and sensor devices. The discovery of novel switching phenomena such as spin torque, voltage controlled magnetic anisotropy and giant spin Hall has led to new devices and architectures such as MRAMs, STTRAMs, STNOs, ASL, stochastic and neuromophic. The challenge is that while magnetic switching is intrinsically energy efficient, there is considerable energy dissipation in the overhead circuitry in creating the switching fields. Scalability brings added concerns with efficient readability and reliability. In short, a winning device must navigate a complex multi-dimensional design and material space, constrained by physical volume, speed, energy and read-write-retention errors. We have developed a multi-scale computational framework to explore innovative designs at different levels (material, device, or circuit), and identify key challenges and potential solutions. At the lowest level, we use Density Functional Theory to identify several stable Heusler half-metals and semiconductors, including some that have now been synthesized. By carefully designing heterojunctions and layered Heusler superlattices, we can engineer high magnetic anisotropy in addition to half-metallicity. Next we use the DFT complex bands into the Non-Equilibrium Green’s Function (NEGF) formalism for fully ‘first principles’ transport characteristics such as tunnel magnetoresistance, spin currents and torques. At the next level, the current is incorporated into a micromagnetic solver based on the stochastic Landau-Lifschitz-Gilbert (LLG) equation for the switching dynamics. Instead of a Monte-Carlo sampling of the noise statistics, we can directly evaluate the switching probability distribution using a much faster Fokker-Planck approach that is well calibrated with empirical models and experimental data. Finally, we use the equations to build SPICE-compatible circuit models, and explore overall energy-delay-reliability trade-offs of architecture built on these devices, such as probabilistic adders and neural networks.