STT-MRAM stands for Spin Transfer Torque Magneto-resistive Random Access Memory (MRAM). Its basic memory cell comprises of one Magnetic Tunnel Junction (MTJ) element connected with one transistor. It evolved from the previous field switched MRAM. STT-MRAM utilizes a spin polarized current through the MTJ to switch the free layer magnetization, thus scales better for smaller devices than field MRAM. The resultant resistance change from parallel and antiparallel alignments between the free and reference layers in the MTJ are used for readout. The discoveries of high Tunneling Magnetoresistance Ratio (TMR) and high interfacial Perpendicular Magnetic Anisotropy (PMA) associated with (001) MgO barrier and Fe alloy have fueled a flurry of R&D activities, leading to fully functional STT-MRAM chip demonstrations and multiple product sampling; product sales are expected within one to two years. We will review the published state of art performances of STT-MRAM technology development, and the demonstrated performance metrics of fully functional STT-MRAM chips; and compare with leading semiconductor memories such as SRAM, DRAM, and Flash performances. Likely initial application areas for STT-MRAM chip products, where its unique characteristics of fast reading and writing speeds combined with high endurance can boost system performances will be presented.