A Low Power Flash-FPGA based Brain Implant Micro-System of PID Control

Lijuan Xia1, Nabeel Fattah2, Ahmed Soltan3, Andrew Jackson2, Eric Graeme Chester, Patrick Degenaar

  • 1Electrical Engineering College
  • 2Newcastle University
  • 3Newcastle University, School of Electrical, Electronic and Compu

Details

14:20 - 14:35 | Wed 12 Jul | Min Room | WeBT4.1

Session: Novel Sensing Methods II

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Abstract

In this paper, we demonstrate that a low power flash FPGA based micro-system can provide a low power programmable interface for closed loop brain implant interface.The proposed micro-system receives recording local field potential (LFP) signals from an implanted probe, performs closed loop control using a first order control system, then converts the signal into a stimulus patter. Stimulus is achieved through optoelectronic optogenetic means on the probe. The long-term target is for both fundamental neuroscience applications and for clinical use in treating epilepsy. Utilizing our device the closed loop processing consumes only 14nJ of power per PID cycle compared to 1.52J per cycle for a micro-controller implementation which is comparable to the power consumption of the optoelectrode probe.